Precision testing of high-resolution analog-to-digital converters (ADCs) can be very time consuming and very costly. For example, complete testing of all codes of a 16-bit ADC with the current state of the art ADC test methods will require 216 (e.g., 65,536) accurate measurements of discrete analog voltage levels (called transition voltages or transition points of the ADC) to completely test the integral nonlinearity (INL) and differential nonlinearity (DNL) of the ADC. In ADC characterization or post-silicon validation, this test needs to be repeated many times at multiple temperatures, at multiple supply voltages, and at multiple other environmental or control conditions. The overall linearity test of an ADC using the state of the art methods can take as long as several days, to several weeks, to even several months. This leads to long engineering cost and long time-to-market. In production test, a single linearity test of a 16 bit ADC can take several seconds to tens of seconds. Testing of higher resolution ADCs would take significantly longer times, with each extra bit requiring two (2), three (3), or four (4) times extra time during the doubling of the number of transition voltages and slower sampling rate. With each second costing about a nickel in production test, test cost of high resolution ADCs becomes expensive using state of the art methodology.